EE Department Intranet - intranet.ee.ic.ac.uk
Close window CTRL+W

ELEC70003 Advanced Electronic Devices


Lecturer(s): Dr Kristel Fobelets

Aims

Field Effect Transistor (FET) technology has reached nanoscale dimensions. This has an impact on their operation, performance and reliability. Classical phenomena are no longer able to describe the operation of these devices, thus Technology Computer Aided Design (TCAD) has become essential to predict the operation and performance of these miniature devices.
The purpose of the module is to understand the impact of very short channel lengths on the performance of FETs. Currently, channel lengths are in the 10 nm range and research is pushing this to even smaller dimensions – 2D and 1D FETs. Quantum mechanical phenomena are influencing the operation of these microelectronic workhorses. The proximity of the drain to the source seriously undermines the control of the gate and different techniques need to be applied to maintain the FETs characteristics at the nanoscale.
Industry is increasingly relying on software packages to solve the carrier transport equations numerically. We will use one of these packages, Sentaurus developed by Synopsis, to investigate the problems associated with nanoscale FETs.
We will evaluate the most recent FETs in research and development, covering topics such as finFETs, Ultra thin body and box FETs, nanowire and nanosheet FETs and Single Electron FETs.
At the end of this module you will understand the current state-of-the-art of nanoFETs, their strengths and weaknesses as well as being able to use a commercial tool to simulate the performance of novel nanoscale semiconductor devices.

Learning Outcomes

At the end of this module, you will be able to:
1. Critically analyse transport processes in nanoscale FETs, including tunnelling phenomena and self-heating/cooling.
2. Derive device characteristics given the geometry and material parameters using analytical estimations as well as numerical simulations using Sentaurus TCAD.
3. Extract the performance parameters of FETs and critically appraise their relevance in applications.
4. Read and write technical papers in the field of semiconductor device design and their impact on future CMOS developments.
5. Design/optimise current and novel devices using TCAD software (Sentaurus from Synopsis).

Syllabus

This module covers the challenges in moving to nanoscale FETs.
• Quantum mechanics (non-linear energy band diagrams, quantum mechanical tunnelling)
• Downscaling of FETs and how to maintain reliability
• Strain engineering in MOSFETs to increase the speed of electrons and holes
• Silicon on insulator (SOI) – partially, fully depleted and Ultra-Thin Body and BOX FETs.
• Decreased dimensionality FETs:
o finFETs (commercially available),
o nanowire and nanosheet FETs.
o nanodot FETs: Single Electron Transistor (SET)
• Physical challenges in low dimensional FETs: quantum tunnelling, self-heating, Joule effect
• TCAD (Technology Computer Aided Design), using Sentaurus to design novel semiconductor devices
Assessment
Exam Duration: 3:00hrs
Coursework contribution: 100%

Term: Spring

Closed or Open Book (end of year exam): N/A

Coursework Requirement:
         To be announced

Oral Exam Required (as final assessment): N/A

Prerequisite module(s): None required

Course Homepage: http://bb.imperial.ac.uk

Book List:
No.Reference
1.Solid State Electronic Devices", B.G. Streetman, Prentice Hall International Editions
2.M. Shur, Physics of semiconductor devices, Prentice Hall series in Solid State Physical Electronics
3.Y. Taur, T.H. Ning, Fundamentals of modern VLSI devices, Cambridge University press
4.Y. Tsividis, Operation and modelling of the MOS transistor, McGraw-Hill international editions