In this module, you will learn how to design a modern general-purpose processor, and how to write a compiler that enables your processor to run software written in a high-level programming language. Specifically, in the first half of the module (Instruction Architectures, Autumn term), you will be guided through the process of building your own processor using the Verilog hardware description language, following the RISC-V architecture. In the second half of the module (Compilers, Spring term), you will build your own compiler that is capable of translating software written in the C programming language into low-level instructions that your RISC-V processor can execute.

Upon successful completion of this module, you will be able to:
1. Describe how high-level programs are executed through the sequencing of instructions
2. Create a compiler from a high-level language to an instruction-based language
3. Program a functional model of a CPU
4. Optimise high-level data structures to exploit the low-level memory hierarchy
5. Design data-structures which can represent programs
6. Determine the worst-case propagation delay of a combinational circuit
7. Design arithmetic circuits to meet a specification and determine the propagation delay
8. Evaluate possible architectural solutions against a set of performance objectives
9. Discuss the relationship between throughput, latency, and pipelining

ISAs
- State machines
- Data and control path
- Critical paths and timing
- Pipelining
- Physical storage
- Arithmetic
- Buses
- RTL (Verilog)
- Memory Hierarchy
- Grammars
- Interpreters
- ASTs
- Compiler optimisations
- State machines
- Data and control path
- Critical paths and timing
- Pipelining
- Physical storage
- Arithmetic
- Buses
- RTL (Verilog)
- Memory Hierarchy
- Grammars
- Interpreters
- ASTs
- Compiler optimisations