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ELEC50001 Circuits and Systems


Lecturer(s): Prof Peter Cheung; Dr Aaron Zhao

Aims

This module builds on the first-year modules relating to analogue and digital circuits, computer architecture, and programming, to teach students how to analyse and design electronic circuits with a system level perspective. The aim of this module is to provide students with the theoretical foundations, the design techniques and hands-on experiences of acquiring physical analogue signals, pre-processing them, converting into digital form, then process these in a digital programmable hardware on both a microprocessor and on a Field Programmable Gate Array (FPGA). Unlike Year 1 module on circuits, this year students will learn to process signals that have noise and electronic hardware that are non-ideal.

Learning Outcomes

On successful completion of this module, students should be able to:

- Design, analyse and explain sensors analogue circuit interfaces between the input and digital signal processing phase;
- Explain the common type of DAC and ADC architectures currently used in industry; .
- Design low-pass, high-pass and band-pass filters for preconditioning signals;
- Choose suitable low-noise pre-amplifiers and analyse its impact on noise performance of the system;
- Choose suitable output circuit architecture for high current drive and design a circuit to meet specification;
- Design reasonably complex circuits involving digital building blocks such as shift register, RAM and FSM, and interface them to a processor;
- Write good quality Verilog code to specify digital hardware;
- Implement digital hardware on an FPGA; Design a basic testbench circuit.

Syllabus

Topics to be covered are:

- Sensors;
- Sampling and quantization of signals;
- Data conversion and converters; Analogue filters;
- High current drive circuits;
- Digital building blocks (e.g. shift registers, RAM/ROM, Multipliers);
- FPGA architectures;
- Finite State Machine (FSM) Design;
- Digital interfacing;
- Digital Design in Verilog HDL;
- Testbench designs
Assessment
Exam Duration: N/A
Exam contribution: 60%
Coursework contribution: 40%

Term: Autumn

Closed or Open Book (end of year exam): Closed

Coursework Requirement:
         Laboratory Experiment
         Non-assessed problem sheets

Oral Exam Required (as final assessment): no

Prerequisite module(s): None required

Course Homepage: http://

Book List: