The aim of the module is to enable you to design digital systems of medium complexity, by covering topics on system architecture, pocessors, communication and memory. The module is complemented by a practical component (i.e. coursework) with strong emphasis on the design methodolody in the case where an FPGA device is targeted, where a fully operational processing system needs to be designed, enabling you to apply in practice the theory that have been taught and to consider performance-resource trade-offs. The module also exposes you to modern tools for hardware design, by focusing on High Level Synthesis (HLS) hardware description.

On successful completion of the module, you should be able to: a) Design a Digital System using modern CAD tools and HLS language b) Analyse the performance of a digital system c) Optimise a digital system for performance (latency, throughput) d) Propose an architecture that meets resource and performance specifications

In this module the principles and techniques for designing reasonably large digital circuits and systems will be studied. Based on the design of a practical medium-sized circuit, and a number of smaller examples, the module covers the following topics: System bus interfacing; FPGA architectures; Multiplier circuits; Dynamic memory interfacing and DMA control circuits; Timing issues in digital circuits: hazards, metastability and races; High-speed digital design techniques;